Open cell library in 15nm freepdk technology M Martins, JM Matos, RP Ribas, A Reis, G Schlinker, L Rech, J Michelsen Proceedings of the 2015 Symposium on International Symposium on Physical …, 2015 | 268 | 2015 |
Micromachined microwave planar spiral inductors and transformers RP Ribas, J Lescot, JL Leclercq, JM Karam, F Ndagijimana IEEE Transactions on microwave Theory and Techniques 48 (8), 1326-1335, 2000 | 141 | 2000 |
Leakage current in sub-micrometer cmos gates PF Butzen, RP Ribas Universidade Federal do Rio Grande do Sul, 1-28, 2006 | 93 | 2006 |
Boolean factoring with multi-objective goals MGA Martins, L Rosa, AB Rasmussen, RP Ribas, AI Reis 2010 IEEE International Conference on Computer Design, 229-234, 2010 | 58 | 2010 |
III–V micromachined devices for microsystems JL Leclercq, RP Ribas, JM Karam, P Viktorovitch Microelectronics Journal 29 (9), 613-619, 1998 | 56 | 1998 |
Power consumption analysis in static CMOS gates A Wiltgen, KA Escobar, AI Reis, RP Ribas 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013 | 52 | 2013 |
DAG based library-free technology mapping FS Marques, LS Rosa Jr, RP Ribas, SS Sapatnekar, AI Reis Proceedings of the 17th ACM Great Lakes symposium on VLSI, 293-298, 2007 | 47 | 2007 |
BTI, HCI and TDDB aging impact in flip–flops C Nunes, PF Butzen, AI Reis, RP Ribas Microelectronics Reliability 53 (9-11), 1355-1359, 2013 | 42 | 2013 |
KL-cuts: a new approach for logic synthesis targeting multiple output blocks O Martinello, FS Marques, RP Ribas, AI Reis 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 42 | 2010 |
Graph-based transistor network generation method for supergate design VN Possani, V Callegaro, AI Reis, RP Ribas, F de Souza Marques, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 692-705, 2015 | 41 | 2015 |
Exact lower bound for the number of switches in series to implement a combinational logic cell FR Schneider, RP Ribas, SS Sapatnekar, AI Reis 2005 International Conference on Computer Design, 357-362, 2005 | 37 | 2005 |
Semi-custom NCL design with commercial EDA frameworks: Is it possible? M Moreira, A Neutzling, M Martins, A Reis, R Ribas, N Calazans 2014 20th IEEE International Symposium on Asynchronous Circuits and Systems …, 2014 | 33 | 2014 |
Bulk micromachining characterization of 0.2 μm HEMT MMIC technology for GaAs MEMS design RP Ribas, JL Leclercq, JM Karam, B Courtois, P Viktorovitch Materials Science and Engineering: B 51 (1-3), 267-273, 1998 | 33 | 1998 |
Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits PF Butzen, LS da Rosa Jr, EJD Chiappetta Filho, AI Reis, RP Ribas Microelectronics Journal 41 (4), 247-255, 2010 | 32 | 2010 |
Switch level optimization of digital CMOS gate networks LS da Rosa, FR Schneider, RP Ribas, AI Reis 2009 10th International Symposium on Quality Electronic Design, 324-329, 2009 | 32 | 2009 |
Fast disjoint transistor networks from BDDs LS da Rosa Junior, FS Marques, TMG Cardoso, RP Ribas, ... Proceedings of the 19th annual symposium on Integrated circuits and systems …, 2006 | 27 | 2006 |
Micromachined planar spiral inductor in standard GaAs HEMT MMIC technology RP Ribas, J Lescot, JL Leclercq, N Bennouri, JM Karam, B Courtois IEEE Electron Device Letters 19 (8), 285-287, 1998 | 27 | 1998 |
Factored forms for memristive material implication stateful logic FS Marranghello, V Callegaro, MGA Martins, AI Reis, RP Ribas IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (2 …, 2015 | 26 | 2015 |
Methodology for achieving best trade-off of area and fault masking coverage in ATMR IAC Gomes, M Martins, FL Kastensmidt, A Reis, R Ribas, SP Novalès 2014 15th Latin American Test Workshop-LATW, 1-6, 2014 | 26 | 2014 |
Unified theory to build cell-level transistor networks from BDDs [logic synthesis] REB Poli, FR Schneider, RP Ribas, AI Reis 16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003 …, 2003 | 26 | 2003 |