Sigma: A sparse and irregular gemm accelerator with flexible interconnects for dnn training E Qin, A Samajdar, H Kwon, V Nadella, S Srinivasan, D Das, B Kaul, ... 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 452 | 2020 |
A study of BFLOAT16 for deep learning training D Kalamkar, D Mudigere, N Mellempudi, D Das, K Banerjee, S Avancha, ... arXiv preprint arXiv:1905.12322, 2019 | 355 | 2019 |
Mixed precision training with 8-bit floating point N Mellempudi, S Srinivasan, D Das, B Kaul arXiv preprint arXiv:1905.12334, 2019 | 77 | 2019 |
Optimizing deep learning recommender systems training on cpu cluster architectures D Kalamkar, E Georganas, S Srinivasan, J Chen, M Shiryaev, A Heinecke SC20: International Conference for High Performance Computing, Networking …, 2020 | 54 | 2020 |
Astra-sim: Enabling sw/hw co-design exploration for distributed dl training platforms S Rashidi, S Sridharan, S Srinivasan, T Krishna 2020 IEEE International Symposium on Performance Analysis of Systems and …, 2020 | 54 | 2020 |
Enabling compute-communication overlap in distributed deep learning training platforms S Rashidi, M Denton, S Sridharan, S Srinivasan, A Suresh, J Nie, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 41 | 2021 |
Reliability evaluation of compressed deep learning models BF Goldstein, S Srinivasan, D Das, K Banerjee, L Santiago, VC Ferreira, ... 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 1-5, 2020 | 30 | 2020 |
Themis: A network bandwidth-aware collective scheduling policy for distributed training of dl models S Rashidi, W Won, S Srinivasan, S Sridharan, T Krishna Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 28 | 2022 |
Astra-sim2. 0: Modeling hierarchical networks and disaggregated systems for large-model training at scale W Won, T Heo, S Rashidi, S Sridharan, S Srinivasan, T Krishna 2023 IEEE International Symposium on Performance Analysis of Systems and …, 2023 | 25 | 2023 |
Exploring heterogeneity within a core for improved power efficiency S Srinivasan, N Kurella, I Koren, S Kundu IEEE Transactions on Parallel and Distributed Systems 27 (4), 1057-1069, 2015 | 19 | 2015 |
Extending sparse tensor accelerators to support multiple compression formats E Qin, G Jeong, W Won, SC Kao, H Kwon, S Srinivasan, D Das, GE Moon, ... 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2021 | 18 | 2021 |
Cross-level protection of circuits against faults and malicious attacks V Tomashevich, S Srinivasan, F Foerg, I Polian 2012 IEEE 18th International On-Line Testing Symposium (IOLTS), 150-155, 2012 | 17 | 2012 |
A lightweight error-resiliency mechanism for deep neural networks BF Goldstein, VC Ferreira, S Srinivasan, D Das, AS Nery, S Kundu, ... 2021 22nd International Symposium on Quality Electronic Design (ISQED), 311-316, 2021 | 15 | 2021 |
A study of BFLOAT16 for deep learning training (2019) D Kalamkar, D Mudigere, N Mellempudi, D Das, K Banerjee, S Avancha, ... arXiv preprint arXiv:1905.12322, 1905 | 15 | 1905 |
Program phase duration prediction and its application to fine-grain power management S Srinivasan, R Kumar, S Kundu 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 127-132, 2013 | 14 | 2013 |
Online mechanism for reliability and power-efficiency management of a dynamically reconfigurable core S Srinivasan, I Koren, S Kundu 2015 33rd IEEE International Conference on Computer Design (ICCD), 327-334, 2015 | 10 | 2015 |
Training google neural machine translation on an intel cpu cluster DD Kalamkar, K Banerjee, S Srinivasan, S Sridharan, E Georganas, ... 2019 IEEE International Conference on Cluster Computing (CLUSTER), 1-10, 2019 | 8 | 2019 |
A study of BFLOAT16 for deep learning training K Dhiraj, M Dheevatsa, M Naveen, D Dipankar, B Kunal, A Sasikanth, ... arXiv preprint arXiv:1905.12322, 2019 | 7 | 2019 |
Dynamic reconfiguration vs. dvfs: A comparative study on power efficiency of processors S Srinivasan, N Kurella, I Koren, S Kundu 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 7 | 2016 |
A study on polymorphing superscalar processor dynamically to improve power efficiency S Srinivasan, R Rodrigues, A Annamalai, I Koren, S Kundu 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 46-51, 2013 | 7 | 2013 |