| A deep Q-learning approach for dynamic management of heterogeneous processors U Gupta, SK Mandal, M Mao, C Chakrabarti, UY Ogras IEEE Computer Architecture Letters 18 (1), 14-17, 2019 | 64 | 2019 |
| Compact modeling of STT-MTJ devices Z Xu, C Yang, M Mao, KB Sutaria, C Chakrabarti, Y Cao Solid-State Electronics 102, 76-81, 2014 | 35 | 2014 |
| Optimizing latency, energy, and reliability of 1T1R ReRAM through cross-layer techniques M Mao, Y Cao, S Yu, C Chakrabarti IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 (3 …, 2016 | 33 | 2016 |
| MAX2: An ReRAM-Based Neural Network Accelerator That Maximizes Data Reuse and Area Utilization M Mao, X Peng, R Liu, J Li, S Yu, C Chakrabarti IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (2 …, 2019 | 30 | 2019 |
| Optimizing latency, energy, and reliability of 1T1R ReRAM through appropriate voltage settings M Mao, Y Cao, S Yu, C Chakrabarti 2015 33rd IEEE International Conference on Computer Design (ICCD), 359-366, 2015 | 25 | 2015 |
| A multilayer approach to designing energy-efficient and reliable ReRAM cross-point array system M Mao, PY Chen, S Yu, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (5 …, 2017 | 19 | 2017 |
| Design and analysis of energy-efficient and reliable 3-D ReRAM cross-point array system M Mao, S Yu, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (7 …, 2018 | 18 | 2018 |
| Programming strategies to improve energy efficiency and reliability of ReRAM memory systems M Mao, Y Cao, S Yu, C Chakrabarti 2015 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2015 | 14 | 2015 |
| A versatile ReRAM-based accelerator for convolutional neural networks M Mao, X Sun, X Peng, S Yu, C Chakrabarti 2018 IEEE International Workshop on Signal Processing Systems (SiPS), 211-216, 2018 | 10 | 2018 |
| Cost-effective design solutions for enhancing pram reliability and performance C Yang, M Mao, Y Cao, C Chakrabarti IEEE Transactions on Multi-Scale Computing Systems 3 (1), 1-11, 2016 | 10 | 2016 |
| Improving reliability of reram-based dnn implementation through novel weight distribution J Li, M Mao, C Chakrabarti 2019 IEEE International Workshop on Signal Processing Systems (SiPS), 189-194, 2019 | 3 | 2019 |
| Multi-User Chat Assistant (MUCA): a Framework Using LLMs to Facilitate Group Conversations M Mao, P Ting, Y Xiang, M Xu, J Chen, J Lin https://arxiv.org/abs/2401.04883, 2024 | 2 | 2024 |
| Low cost ECC schemes for improving the reliability of DRAM+ PRAMMAIN memory systems M Mao, C Yang, Z Xu, Y Cao, C Chakrabarti 2014 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2014 | 2 | 2014 |
| VC++ and MATLAB-Based Interactive Filter Design MQ Mao, L Gao, W Zheng, ZW Mao Applied Mechanics and Materials 66, 1972-1975, 2011 | 1 | 2011 |
| Impact Factor Analysis on Repeater Coordination M Ziwei, M Manqing, D Ran Proceedings of 2011 International Conference on Information Management and …, 2011 | 1 | 2011 |
| Design and Optimization of Resistive RAM-based Storage and Computing Systems M Mao Arizona State University, 2019 | | 2019 |
Chaitali ChakrabartiProfessor of Electrical Engineering, SECEE, Arizona State UniversityVerified email at asu.edu
