Ensemble learning for effective run-time hardware-based malware detection: a comprehensive analysis and classification H Sayadi, N Patel, SM P D, A Sasan, S Rafatirad, H Homayoun Design Automation Conference, 1, 2018 | 194 | 2018 |
Machine learning for power, energy, and thermal management on multicore processors: A survey S Pagani, PDS Manoj, A Jantsch, J Henkel IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 110 | 2018 |
Pyramid: Machine learning framework to estimate the optimal timing and resource usage of a high-level synthesis design HM Makrani, F Farahmand, H Sayadi, S Bondi, SMP Dinakarrao, ... 2019 29th International Conference on Field Programmable Logic and …, 2019 | 97 | 2019 |
2smart: A two-stage machine learning-based approach for run-time specialized hardware-assisted malware detection H Sayadi, HM Makrani, SMP Dinakarrao, T Mohsenin, A Sasan, ... 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 728-733, 2019 | 89 | 2019 |
Lightweight node-level malware detection and network-level malware confinement in iot networks SMP Dinakarrao, H Sayadi, HM Makrani, C Nowzari, S Rafatirad, ... 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 776-781, 2019 | 77 | 2019 |
Neural network based ECG anomaly detection on FPGA and trade-off analysis M Wess, PDS Manoj, A Jantsch 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 73 | 2017 |
Customized machine learning-based hardware-assisted malware detection in embedded devices H Sayadi, HM Makrani, O Randive, SM PD, S Rafatirad, H Homayoun 2018 17th IEEE International Conference On Trust, Security And Privacy In …, 2018 | 71 | 2018 |
Adversarial attack on microarchitectural events based malware detectors SMP Dinakarrao, S Amberkar, S Bhat, A Dhavlle, H Sayadi, A Sasan, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 66 | 2019 |
A review of in-memory computing architectures for machine learning applications S Bavikadi, PR Sutradhar, KN Khasawneh, A Ganguly, ... Proceedings of the 2020 on Great Lakes Symposium on VLSI, 89-94, 2020 | 64 | 2020 |
Computer-aided arrhythmia diagnosis with bio-signal processing: A survey of trends and techniques SMP Dinakarrao, A Jantsch, M Shafique ACM Computing Surveys (CSUR) 52 (2), 1-37, 2019 | 63 | 2019 |
Security and complexity analysis of LUT-based obfuscation: From blueprint to reality G Kolhe, HM Kamali, M Naicker, TD Sheaves, H Mahmoodi, PDS Manoj, ... 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 60 | 2019 |
Reliable 3-D clock-tree synthesis considering nonlinear capacitive TSV model with electrical–thermal–mechanical coupling MPD Sai, H Yu, Y Shang, CS Tan, SK Lim IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 53 | 2013 |
Comprehensive Assessment of Run-Time Hardware-Supported Malware Detection Using General and Ensemble Learning H Sayadi, SM P D, A Houmansadr, S Rafatirad, Homayoun ACM International Conference on Computing Frontiers, 2018 | 46 | 2018 |
Rnn-based classifier to detect stealthy malware using localized features and complex symbolic sequence S Shukla, G Kolhe, SM PD, S Rafatirad 2019 18th IEEE International Conference On Machine Learning And Applications …, 2019 | 44 | 2019 |
A survey on machine learning accelerators and evolutionary hardware platforms S Bavikadi, A Dhavlle, A Ganguly, A Haridass, H Hendy, C Merkel, ... IEEE Design & Test 39 (3), 91-116, 2022 | 41 | 2022 |
On-device malware detection using performance-aware and robust collaborative learning S Shukla, PDS Manoj, G Kolhe, S Rafatirad 2021 58th ACM/IEEE Design Automation Conference (DAC), 967-972, 2021 | 41 | 2021 |
A scalable network-on-chip microprocessor with 2.5 D integrated memory and accelerator SM PD, J Lin, S Zhu, Y Yin, X Liu, X Huang, C Song, W Zhang, M Yan, ... IEEE Transactions on Circuits and Systems I: Regular Papers 64 (6), 1432-1443, 2017 | 41 | 2017 |
Dfssd: Deep faults and shallow state duality, a provably strong obfuscation solution for circuits with restricted access to scan chain S Roshanisefat, HM Kamali, KZ Azar, SMP Dinakarrao, N Karimi, ... 2020 IEEE 38th VLSI Test Symposium (VTS), 1-6, 2020 | 40 | 2020 |
On custom LUT-based obfuscation G Kolhe, SM PD, S Rafatirad, H Mahmoodi, A Sasan, H Homayoun Proceedings of the 2019 on Great Lakes Symposium on VLSI, 477-482, 2019 | 39 | 2019 |
Weighted quantization-regularization in DNNs for weight memory minimization toward HW implementation M Wess, SMP Dinakarrao, A Jantsch IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 39 | 2018 |