| Sensitivity and evaluation of current fire risk and future projections due to climate change: the case study of Greece A Karali, M Hatzaki, C Giannakopoulos, A Roussos, G Xanthopoulos, ... Natural Hazards and Earth System Science 14 (1), 143-153, 2014 | 86 | 2014 |
| Aging Benefits in Nanometer CMOS Designs D Rossi, V Tenentes, S Yang, S Khursheed, B Al-Hashimi IEEE Transactions on Circuits and Systems II: Express Briefs 64 (3), 324-328, 2017 | 41 | 2017 |
| Reliable power gating with NBTI aging benefits D Rossi, V Tenentes, S Yang, S Khursheed, B Al-Hashimi IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1-10, 2016 | 30 | 2016 |
| State skip LFSRs: Bridging the gap between test data compression and test set embedding for IP cores V Tenentes, X Kavousianos, E Kalligeros Proceedings of the conference on Design, automation and test in Europe, 474-479, 2008 | 30 | 2008 |
| Single and variable-state-skip LFSRs: bridging the gap between test data compression and test set embedding for IP cores V Tenentes, X Kavousianos, E Kalligeros IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 28 | 2010 |
| Coarse-Grained Online Monitoring of BTI Aging by Reusing Power-Gating Infrastructure V Tenentes, D Rossi, S Yang, S Khursheed, BM Al-Hashimi, SR Gunn IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017 | 23 | 2017 |
| Defect aware x-filling for low-power scan testing S Balatsouka, V Tenentes, X Kavousianos, K Chakrabarty 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 23 | 2010 |
| NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating D Rossi, V Tenentes, S Khursheed, B Al-Hashimi 20th IEEE European Test Symposium (ETS 2015), 2015 | 20 | 2015 |
| BTI and leakage aware dynamic voltage scaling for reliable low power cache memories D Rossi, V Tenentes, S Khursheed, BM Al-Hashimi IEEE international on-Line testing symposium (IOLTS'15), 2015 | 19 | 2015 |
| Defect-Oriented LFSR Reseeding to Target Unmodeled Defects Using Stuck-at Test Sets X Kavousianos, V Tenentes, K Chakrabarty, E Kalligeros IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (12 …, 2011 | 18 | 2011 |
| High-quality statistical test compression with narrow ATE interface V Tenentes, X Kavousianos IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 16 | 2013 |
| Exploiting aging benefits for the design of reliable drowsy cache memories D Rossi, V Tenentes, SM Reddy, BM Al-Hashimi, A Brown IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 | 13 | 2018 |
| BTI aware thermal management for reliable DVFS designs H Chahal, V Tenentes, D Rossi, BM Al-Hashimi 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2016 | 13 | 2016 |
| High quality testing of grid style power gating V Tenentes, S Khursheed, BM Al-Hashimi, S Zhong, S Yang 2014 IEEE 23rd Asian Test Symposium, 186-191, 2014 | 10 | 2014 |
| Sensitivity and evaluation of current fire risk and future projections due to climate change: the case study of Greece A Karali, M Hatzaki, C Giannakopoulos, A Roussos, G Xanthopoulos, ... Natural Hazards Earth Systems Science Discussion 1, 4777-4800, 2013 | 10 | 2013 |
| Low power test-compression for high test-quality and low test-data volume V Tenentes, X Kavousianos 2011 Asian Test Symposium, 46-53, 2011 | 10 | 2011 |
| Test-data volume and scan-power reduction with low ATE interface for multi-core SoCs V Tenentes, X Kavousianos 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 747-754, 2011 | 10 | 2011 |
| Recycled IC detection through aging sensor D Rossi, V Tenentes, S Khursheed, SM Reddy 2018 IEEE 23rd European Test Symposium (ETS), 1-2, 2018 | 9 | 2018 |
| MeV ion event observed at 0950 UT on 4 May 1998 at a quasi‐perpendicular bow shock region: New observations and an alternative interpretation on its origin GC Anagnostopoulos, V Tenentes, ES Vassiliadis Journal of Geophysical Research: Space Physics 114 (A9), 2009 | 8 | 2009 |
| The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology B Halak, V Tenentes, D Rossi Microelectronics Reliability 67, 74-81, 2016 | 7 | 2016 |
Daniele RossiUniversity of Pisa, ItalyVerified email at unipi.it
