Xiaohang Wang
Cited by
Cited by
On self-tuning networks-on-chip for dynamic network-flow dominance adaptation
X Wang, M Yang, Y Jiang, P Liu, M Daneshtalab, M Palesi, T Mak
ACM Transactions on Embedded Computing Systems (TECS) 13 (2s), 1-21, 2014
A power-aware mapping approach to map IP cores onto NoCs under bandwidth and latency constraints
X Wang, M Yang, Y Jiang, P Liu
ACM Transactions on Architecture and Code Optimization (TACO) 7 (1), 1-30, 2010
Adaptive routing algorithms for lifetime reliability optimization in network-on-chip
L Wang, X Wang, T Mak
IEEE Transactions on Computers 65 (9), 2896-2902, 2015
Bubble budgeting: Throughput optimization for dynamic workloads by exploiting dark cores in many core systems
X Wang, AK Singh, B Li, Y Yang, H Li, T Mak
IEEE Transactions on Computers 67 (2), 178-192, 2017
Improving the efficiency of thermal covert channels in multi-/many-core systems
Z Long, X Wang, Y Jiang, G Cui, L Zhang, T Mak
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
Energy efficient run-time incremental mapping for 3-D networks-on-chip
XH Wang, P Liu, M Yang, M Palesi, YT Jiang, MC Huang
Journal of Computer Science and Technology 28 (1), 54-71, 2013
On an efficient NoC multicasting scheme in support of multiple applications running on irregular sub-networks
X Wang, M Yang, Y Jiang, P Liu
Microprocessors and Microsystems 35 (2), 119-129, 2011
Defragmentation for efficient runtime resource management in NoC-based many-core systems
J Ng, X Wang, AK Singh, T Mak
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (11 …, 2016
Power-aware mapping for network-on-chip architectures under bandwidth and latency constraints
X Wang, M Yang, Y Jiang, P Liu
2009 Fourth International Conference on Embedded and Multimedia Computing, 1-6, 2009
Low latency and energy efficient multicasting schemes for 3D NoC-based SoCs
X Wang, M Palesi, M Yang, Y Jiang, MC Huang, P Liu
2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 337-342, 2011
A NoC emulation/verification framework
P Liu, C Xiang, X Wang, B Xia, Y Liu, W Wang, Q Yao
2009 Sixth International Conference on Information Technology: New …, 2009
Dynamic programming-based lifetime aware adaptive routing algorithm for network-on-chip
L Wang, X Wang, T Mak
2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC …, 2014
A hybrid optoelectronic networks-on-chip architecture
X Tan, M Yang, L Zhang, X Wang, Y Jiang
Journal of lightwave technology 32 (5), 991-998, 2014
A networks-on-chip architecture design space exploration–the LIB
P Liu, B Xia, C Xiang, X Wang, W Wang, Q Yao
Computers & Electrical Engineering 35 (6), 817-836, 2009
Upward packet popup for deadlock freedom in modular chiplet-based systems
Y Wu, L Wang, X Wang, J Han, J Zhu, H Jiang, S Yin, S Wei, L Liu
2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022
ACDC: An accuracy-and congestion-aware dynamic traffic control method for networks-on-chip
S Xiao, X Wang, M Palesi, AK Singh, T Mak
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 630-633, 2019
Unbiased regional congestion aware selection function for nocs
W Zong, MO Agyemen, X Wang, T Maky
Proceedings of the 9th International Symposium on Networks-on-Chip, 1-8, 2015
Exploiting dark cores for performance optimization via patterning for many-core chips in the dark silicon era
X Wang, AK Singh, S Wen
2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2018
A non-minimal routing algorithm for aging mitigation in 2D-mesh NoCs
L Wang, X Wang, HF Leung, T Mak
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
On fine-grained runtime power budgeting for networks-on-chip systems
X Wang, B Zhao, T Mak, M Yang, Y Jiang, M Daneshtalab
IEEE Transactions on Computers 65 (9), 2780-2793, 2015
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