| A practical hafnium-oxide memristor model suitable for circuit design and simulation S Amer, S Sayyaparaju, GS Rose, K Beckmann, NC Cady 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 56 | 2017 |
| Circuit Techniques for Online Learning of Memristive Synapses in CMOS-Memristor Neuromorphic Systems S Sayyaparaju, G Chakma, S Amer, GS Rose Proceedings of the on Great Lakes Symposium on VLSI 2017, 479-482, 2017 | 20 | 2017 |
| A Twin Memristor Synapse for Spike Timing Dependent Learning in Neuromorphic Systems MM Adnan, S Sayyaparaju, GS Rose, CD Schuman, BW Ku, SK Lim 2018 31st IEEE International System-on-Chip Conference (SOCC), 37-42, 2018 | 16 | 2018 |
| Fabrication and Performance of Hybrid ReRAM-CMOS Circuit Elements for Dynamic Neural Networks M Liehr, J Hazra, K Beckmann, W Olin-Ammentorp, N Cady, R Weiss, ... Proceedings of the International Conference on Neuromorphic Systems, 1-4, 2019 | 14 | 2019 |
| A mixed-signal approach to memristive neuromorphic system design G Chakma, S Sayyaparaju, R Weiss, GS Rose 2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017 | 13 | 2017 |
| A bi-memristor synapse with spike-timing-dependent plasticity for on-chip learning in memristive neuromorphic systems S Sayyaparaju, S Amer, GS Rose 2018 19th International Symposium on Quality Electronic Design (ISQED), 69-74, 2018 | 12 | 2018 |
| Device-aware Circuit Design for Robust Memristive Neuromorphic Systems with STDP-based Learning S Sayyaparaju, MM Adnan, S Amer, GS Rose ACM Journal on Emerging Technologies in Computing Systems (JETC) 16 (3), 1-25, 2020 | 8 | 2020 |
| Full CMOS-Memristor Implementation of a Dynamic Neuromorphic Architecture N Cady, K Beckmann, W Olin-Ammentorp, G Chakma, S Amer, R Weiss, ... Air Force Research Laboratory/RITB Rome United States, 2018 | 8 | 2018 |
| A Mixed-Mode Neuron with On-chip Tunability for Generic Use in Memristive Neuromorphic Systems S Sayyaparaju, R Weiss, GS Rose 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 441-446, 2018 | 7 | 2018 |
| Circuit Techniques for Efficient Implementation of Memristor Based Reservoir Computing S Sayyaparaju, MSA Shawkat, MM Adnan, GS Rose 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 3 | 2020 |
| An efficient methodology to characterize the TSPC flip flop setup time for static timing analysis SS Varma, A Sharma, B Anand 2016 13th International Conference on Synthesis, Modeling, Analysis and …, 2016 | 3 | 2016 |
| A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor Memory MM Adnan, S Amer, S Sayyaparaju, MS Hasan, GS Rose 2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019 | 2 | 2019 |
