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Ayman Hroub
Ayman Hroub
Department of Electrical and Computer Engineering at Birzeit University
Verified email at birzeit.edu - Homepage
Title
Cited by
Cited by
Year
Empirical investigation of the challenges of the existing tools used in global software development projects
M Niazi, S Mahmood, M Alshayeb, A Hroub
IET software 9 (5), 135-143, 2015
672015
Multi-core compact executable trace processor
ME Elrabaa, AA Hroub
US Patent 10,068,041, 2018
162018
SecSoC: A secure system on chip architecture for IoT devices
A Hroub, MES Elrabaa
2022 IEEE International Symposium on Hardware Oriented Security and Trust …, 2022
62022
A very fast trace-driven simulation platform for chip-multiprocessors architectural explorations
MES Elrabaa, A Hroub, MF Mudawar, A Al-Aghbari, M Al-Asli, A Khayyat
IEEE Transactions on Parallel and Distributed Systems 28 (11), 3033-3045, 2017
62017
Mode choice behavior modeling: a synergy by hybrid neural network and fuzzy logic system
K Assi, SM Rahman, I Al-Sghan, A Hroub, N Ratrout
Arabian Journal for Science and Engineering 47 (4), 5255-5269, 2022
22022
Efficient generation of compact execution traces for multicore architectural simulations
A Hroub, MES Elrabaa, MF Mudawar, A Khayyat
ACM Transactions on Architecture and Code Optimization (TACO) 14 (3), 1-25, 2017
22017
Energy Efficient and Fast CNN Inference by Exploring Weight Approximation and Computational Reuse
MF Tolba, H Saleh, B Mohammad, M Al-Qutayri, A Hroub, T Stouraitis
IEEE Transactions on Artificial Intelligence, 2023
12023
Challenges of the existing tools used in global software development projects
M Niazi, S Mahmood, M Alshayeb, A Hroub
Department of Information and Computer Science, King Fahd University of …, 2014
12014
Accelerating memory and I/O intensive HPC applications using hardware compression
S AlSaleh, MES Elrabaa, A El-Maleh, K Daud, A Hroub, M Mudawar, ...
Journal of Parallel and Distributed Computing 193, 104955, 2024
2024
AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification
M Ismael, A Hroub, A Abu-Issa
2023 International Conference on Microelectronics (ICM), 162-167, 2023
2023
Efficient CNN Hardware Architecture Based on Linear Approximation and Computation Reuse Technique
MF Tolba, H Saleh, M Al-Qutayri, A Hroub, T Stouraitis
2023 International Conference on Microelectronics (ICM), 7-10, 2023
2023
Device for simulating multicore processors
ME Elrabaa, AA Hroub
US Patent 10,846,450, 2020
2020
Method for simulating execution of an application on a multi-core processor
ME Elrabaa, AA Hroub
US Patent 10,482,203, 2019
2019
Towards a Test Definition Language for Integrated Circuits
M Alshayeb, MES Elrabaa, A Hroub, A Al-Aghbari, AH El-Maleh, ...
Journal of Circuits, Systems and Computers 24 (03), 1550027, 2015
2015
HySim: A Hybrid Software/Hardware Simulation Framework for Early Architectural Exploration of Chip Multiprocessors
AAM Hroub
PQDT-Global, 2015
2015
Multithreaded Processor Core Optimized for Parallel Thread Execution
AAM Hroub
King Fahd University of Petroleum and Minerals (Saudi Arabia), 2011
2011
Clustering Cores for Parallel Thread Execution
MF Mudawar, AA Hroub
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Articles 1–17