| Hierarchical clustering with hard-batch triplet loss for person re-identification K Zeng, M Ning, Y Wang, Y Guo Proceedings of the IEEE/CVF conference on computer vision and pattern …, 2020 | 353 | 2020 |
| FLIN: Enabling fairness and enhancing performance in modern NVMe solid state drives A Tavakkol, M Sadrosadati, S Ghose, J Kim, Y Luo, Y Wang, NM Ghiasi, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 102 | 2018 |
| Figaro: Improving system performance via fine-grained in-dram data relocation and caching Y Wang, L Orosa, X Peng, Y Guo, S Ghose, M Patel, JS Kim, JG Luna, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 89 | 2020 |
| Reducing DRAM latency via charge-level-aware look-ahead partial restoration Y Wang, A Tavakkol, L Orosa, S Ghose, NM Ghiasi, M Patel, JS Kim, ... 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 57 | 2018 |
| Codic: A low-cost substrate for enabling custom in-dram functionalities and optimizations L Orosa, Y Wang, M Sadrosadati, JS Kim, M Patel, I Puddu, H Luo, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 38 | 2021 |
| ITAP: Idle-time-aware power management for GPU execution units M Sadrosadati, SB Ehsani, H Falahati, R Ausavarungnirun, A Tavakkol, ... ACM Transactions on Architecture and Code Optimization (TACO) 16 (1), 1-26, 2019 | 32 | 2019 |
| Configurable multi-directional systolic array architecture for convolutional neural networks R Xu, S Ma, Y Wang, X Chen, Y Guo ACM Transactions on Architecture and Code Optimization (TACO) 18 (4), 1-24, 2021 | 31 | 2021 |
| FT-matrix: A coordination-aware architecture for signal processing S Chen, Y Wang, S Liu, J Wan, H Chen, H Liu, K Zhang, X Liu, X Ning IEEE micro 34 (6), 64-73, 2013 | 30 | 2013 |
| MT-3000: a heterogeneous multi-zone processor for HPC K Lu, Y Wang, Y Guo, C Huang, S Liu, R Wang, J Fang, T Tang, Z Chen, ... CCF Transactions on High Performance Computing 4 (2), 150-164, 2022 | 27 | 2022 |
| Heterogeneous systolic array architecture for compact cnns hardware accelerators R Xu, S Ma, Y Wang, Y Guo, D Li, Y Qiao IEEE Transactions on Parallel and Distributed Systems 33 (11), 2860-2871, 2021 | 26 | 2021 |
| Energy clustering for unsupervised person re-identification K Zeng, M Ning, Y Wang, Y Guo Image and Vision Computing 98, 103913, 2020 | 26 | 2020 |
| Advancing DSP into HPC, AI, and beyond: challenges, mechanisms, and future directions Y Wang, C Li, C Liu, S Liu, Y Lei, J Zhang, Y Zhang, Y Guo CCF Transactions on High Performance Computing 3, 114-125, 2021 | 22 | 2021 |
| Enabling efficient RDMA-based synchronous mirroring of persistent memory transactions A Tavakkol, A Kolli, S Novakovic, K Razavi, J Gómez-Luna, H Hassan, ... arXiv preprint arXiv:1810.09360, 2018 | 21 | 2018 |
| A multiple SIMD, multiple data (MSMD) architecture: Parallel execution of dynamic and static SIMD fragments Y Wang, S Chen, J Wan, J Meng, K Zhang, W Liu, X Ning 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 21 | 2013 |
| Novel design strategy toward a2 trojan detection based on built-in acceleration structure D Deng, Y Wang, Y Guo IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 16 | 2020 |
| Advancing CMOS-type Ising arithmetic unit into the domain of real-world applications J Zhang, S Chen, Y Wang IEEE Transactions on Computers 67 (5), 604-616, 2017 | 16 | 2017 |
| HeSA: Heterogeneous systolic array architecture for compact CNNs hardware accelerators R Xu, S Ma, Y Wang, Y Guo 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 657-662, 2021 | 15 | 2021 |
| Threshold-based hierarchical clustering for person re-identification M Hu, K Zeng, Y Wang, Y Guo Entropy 23 (5), 522, 2021 | 10 | 2021 |
| Instruction shuffle: Achieving mimd-like performance on simd architectures Y Wang, S Chen, K Zhang, J Wan, X Chen, H Chen, H Wang IEEE Computer Architecture Letters 11 (2), 37-40, 2011 | 9 | 2011 |
| Iteration Interleaving--Based SIMD Lane Partition Y Wang, D Wang, S Chen, Z Liu, S Chen, X Chen, X Zhou ACM Transactions on Architecture and Code Optimization (TACO) 12 (4), 1-18, 2016 | 8 | 2016 |
Onur MutluETH Zürich and Carnegie Mellon UniversityVerified email at inf.ethz.ch
